Post by LutzvW on Jan 23, 2005 5:55:20 GMT -5
I am sorry that – as a new member - - I feel it necessary to point to some errors in part 1 of the PLL tutorial. Moreover, some comments/explanations are given below.
1.) The given expression for the loop gain below Fig. 17 is not correct.
Instead, the given formula Pf =...... between Fig. 21 and Equ. 14 equals the loop gain (Of course, the loop gain must include the VCO-term (1/s), as the BODE-plot of the loop gain is used to verify stability.
2.) To understand PLL theory it is important to note that the input and output signals in Fig. 21 are PHASES. This is a necessary condition to linearize the PLL by using a summer to compare the two signals. The PLL model – as given earlier – with a multiplier to combine the voltages of the input resp. VCO signal is strongly nonlinear and, therefore, does not allow to use the linear control theory. Moreover, a nonlinear model does even not allow to define any transfer function in the LAPLACE domaine.
3.) Furthermore, the model in Fig. 21 is valid only for the locked condition (both frequencies equal) and with the assumption that the phase difference is below app. 30 deg.
4.) It is important to realize, that (a) a lead-lag filter is absolutely necessary instead of a simple low pass because of stability reasons and that (b) in equ. 17 the time constant tau1 must be smaller than tau2 (pole frequency below zero frequency).
5.) Legende below Fig. 22: It is right, that the PLL acts as low pass filter – BUT for PHASES !!! To understand this graph and the general function of the PLL it is to be realized, that the transfer function of the linear PLL model is the ratio of two phase functions – not voltage signals !
Therefore, Fig. 22 has to be read correctly: The VCO output of the PLL is able to track the incoming phase variations if the corresponding frequency deviations are well within the loop bandwidth.
_____________________
Finally, I like to mention that – for my opinion – it is a great idea to establish a forum like this for discussion of actual technical problems.
1.) The given expression for the loop gain below Fig. 17 is not correct.
Instead, the given formula Pf =...... between Fig. 21 and Equ. 14 equals the loop gain (Of course, the loop gain must include the VCO-term (1/s), as the BODE-plot of the loop gain is used to verify stability.
2.) To understand PLL theory it is important to note that the input and output signals in Fig. 21 are PHASES. This is a necessary condition to linearize the PLL by using a summer to compare the two signals. The PLL model – as given earlier – with a multiplier to combine the voltages of the input resp. VCO signal is strongly nonlinear and, therefore, does not allow to use the linear control theory. Moreover, a nonlinear model does even not allow to define any transfer function in the LAPLACE domaine.
3.) Furthermore, the model in Fig. 21 is valid only for the locked condition (both frequencies equal) and with the assumption that the phase difference is below app. 30 deg.
4.) It is important to realize, that (a) a lead-lag filter is absolutely necessary instead of a simple low pass because of stability reasons and that (b) in equ. 17 the time constant tau1 must be smaller than tau2 (pole frequency below zero frequency).
5.) Legende below Fig. 22: It is right, that the PLL acts as low pass filter – BUT for PHASES !!! To understand this graph and the general function of the PLL it is to be realized, that the transfer function of the linear PLL model is the ratio of two phase functions – not voltage signals !
Therefore, Fig. 22 has to be read correctly: The VCO output of the PLL is able to track the incoming phase variations if the corresponding frequency deviations are well within the loop bandwidth.
_____________________
Finally, I like to mention that – for my opinion – it is a great idea to establish a forum like this for discussion of actual technical problems.
